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SS22 WS22 SS23 WS23 SS24 WS24 Guidelines for Master Students
Capacitance- and current-voltage characterization of metal-insulator-semiconductor (MIS) structures with topography Capacitance- and current-voltage (CV and IV respectively) characterization of metal-insulator-semiconductor (MIS) structures are well established methods in the analysis of bulk properties and interface quality of insulator-semiconductor systems. However, such characterization is almost exclusively performed using planar structures. The aim of this thesis is to compare the electrical properties of such simple structures to corresponding ones with the additional feature of topography. Thus the consequences of imperfect step coverage of the insulating material is to be addressed. This is important for the production of semiconductor devices since their structure is rarely planar. In this thesis the focus is on dielectrics deposited by chemical vapor deposition (CVD). CVD oxides are non-stoichiometric and show more defects than thermal ones. Therefore the influence of various thermal anneal variants is additionally investigated to improve the insulator quality. This thesis is conducted at the Institute of Solid State Physics of the TU Graz in cooperation with Infineon Technologies in Villach. |